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Move to a pull approach for interrupt detection. - #1899

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Prashanth Mundkur (pmundkur) wants to merge 2 commits into
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pmundkur:interrupt_detect_on_read
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Move to a pull approach for interrupt detection.#1899
Prashanth Mundkur (pmundkur) wants to merge 2 commits into
riscv:masterfrom
pmundkur:interrupt_detect_on_read

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@pmundkur

@pmundkur Prashanth Mundkur (pmundkur) commented Aug 24, 2026

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This removes clint_dispatch(), which pushed (i.e. wrote) updates to mip when memory-mapped registers were updated. This is replaced by update_mip(), which updates mip to incorporate changes from (i.e. reads) these registers before pending interrupts are computed for dispatch.

This defines an interface for interrupt controllers in core/interrupt_interface.sail, and implements this interface for the CLINT in sys/platform.sail.

This required moving the {s,vs}timecmp CSRs to interrupt_regs, and explicitly introducing the CLINT's msip, which was previously implicit in the push-oriented approach. The mtime and mtimecmp registers are kept private to the CLINT, to make it easier to isolate later as a separate platform component.

This aligns the handling of CLINT's interrupts with the handling of those from the simple_interrupt_generator. The handling of external interrupts using the simple_interrupt_generator is unchanged.

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This should wait for #1890 and #1892 to be merged for adequate testing.

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github-actions Bot commented Aug 24, 2026

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Test Results

9 217 tests  ±0   9 217 ✅ ±0   1h 48m 56s ⏱️ + 19m 2s
    1 suites ±0       0 💤 ±0 
    1 files   ±0       0 ❌ ±0 

Results for commit 8fe96cd. ± Comparison against base commit 6352d77.

♻️ This comment has been updated with latest results.

Comment thread model/sys/sys_control.sail Outdated
then deleg else p
}

private function update_mip() -> unit = {

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I haven’t fully looked into the code yet, but why isn’t all of the code below part of read_mip()?

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The {m,s,vs}timecmp CSRs are currently not visible to read_mip. They will eventually need to move out of interrupt_regs anyway and depending on how we refactor, update_mip could then be merged into read_mip.

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Actually, only mtimecmp (and msip) will need to move out.

Comment thread model/sys/sys_control.sail
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It looks like this broke a couple of DAMO tests. I'll investigate ...

Comment thread model/sys/sys_control.sail Outdated
@pmundkur
Prashanth Mundkur (pmundkur) force-pushed the interrupt_detect_on_read branch 2 times, most recently from e2c2dd7 to 15716ba Compare August 26, 2026 16:20
@pmundkur
Prashanth Mundkur (pmundkur) force-pushed the interrupt_detect_on_read branch 2 times, most recently from c66674b to 4176770 Compare August 27, 2026 14:44
This removes `clint_dispatch()`, which pushed updates to `mip` when memory-mapped registers were updated. It is replaced by `update_mip()`, which updates `mip` to incorporate changes from these registers before pending interrupts are computed for dispatch.

This defines an interface for interrupt controllers in `core/interrupt_interface.sail`, and implements this interface for the CLINT in `sys/platform.sail`.

This required moving the `{s,vs}timecmp` CSRs to `interrupt_regs`, and explicitly introducing the CLINT's `msip`, which was previously implicit in the push-oriented approach.  The `mtimecmp` and `mtime` registers are kept private to the CLINT, to make it easier to isolate later as a separate platform component.

This aligns the CLINT's interrupts with the pull-based handling of those from the `simple_interrupt_generator`.

The handling of external interrupts using the `simple_interrupt_generator` is unchanged.
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