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2 changes: 1 addition & 1 deletion Makefile
Original file line number Diff line number Diff line change
Expand Up @@ -10,7 +10,7 @@ clean:
include emulator/Makefile.mk

pytest:
pytest -s
pytest -s --log-cli-level=DEBUG

test: pytest test_verilog_modules

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27 changes: 17 additions & 10 deletions planner/asm/line_parser.py
Original file line number Diff line number Diff line change
@@ -1,9 +1,12 @@
from enum import Enum
import re
from typing import List, Tuple, Optional
from planner import unit, util


def address_of(op: unit.Operand):
if op == unit.Operand.CONSTANT:
return unit.Operand.ADDRESS
if op == unit.Operand.ADDRESS:
return unit.Operand.DADDRESS
raise AssertionError("can't take address of %s" % op)

def parse_line(line: str) -> Tuple[Optional[str], Optional[List[Tuple[unit.Operand, unit.LazyLabel]]]]:
try:
Expand All @@ -28,16 +31,20 @@ def parse_line(line: str) -> Tuple[Optional[str], Optional[List[Tuple[unit.Opera
op = op.strip()
if len(op) == 0:
raise ValueError("no-length operand found in %s" % line)
optype = unit.Operand.CONSTANT
if op.startswith("[") and op.endswith("]"):
optype = address_of(optype)
op = op[1:-1].strip()
if op.startswith("[") and op.endswith("]"):
optype = address_of(optype)
op = op[1:-1].strip()

if op.startswith("R"):
if len(op) != 2 or op[1] not in "0123456789":
raise ValueError("Invalid mem-register {op} provided, only R0..R9 supported.")
optype = unit.Operand.ADDRESS
op = op[1:]
elif op.startswith("[") and op.endswith("]"):
optype = unit.Operand.ADDRESS
op = op[1:-1].strip()
else:
optype = unit.Operand.CONSTANT
optype = address_of(optype)
op = str(int(op[1:])*4)

try:
value = unit.LazyLabel(util.LABEL_CONSTANT, int(op, 0)) # automatically understand base-10 and base-16
except ValueError as e:
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8 changes: 6 additions & 2 deletions planner/asm/line_parser_test.py
Original file line number Diff line number Diff line change
Expand Up @@ -30,10 +30,14 @@ def test_parse_line_success(self):
(unit.Operand.ADDRESS, 22),
(unit.Operand.ADDRESS, 15)])

name, tokens = line_parser.parse_line("load [ 0x16 ] , [[15 ]]")
self.assertEqual(name, "LOAD")
self.assertEqual(tokens, [
(unit.Operand.ADDRESS, 22),
(unit.Operand.DADDRESS, 15)])

def test_parse_line_failures(self):
with self.assertRaises(ValueError):
line_parser.parse_line("mov [10],, [20]")
with self.assertRaises(ValueError):
line_parser.parse_line("mov [10], [[20]]")
with self.assertRaises(ValueError):
line_parser.parse_line("mov 10 10")
4 changes: 3 additions & 1 deletion planner/asm/program_parser.py
Original file line number Diff line number Diff line change
Expand Up @@ -149,6 +149,8 @@ def parse_data(self, tokens: List[str]):
sz = 1
elif tokens[1] == "dw":
sz = 2
elif tokens[1] == "dd":
sz = 4
else:
raise ValueError("unsupported data size provided")

Expand All @@ -157,7 +159,7 @@ def parse_data(self, tokens: List[str]):
assert val >= 0 and val < (2**(8*sz))

for _ in range(times):
for byte in val.to_bytes(sz, 'big'):
for byte in val.to_bytes(sz, 'little'):
self.add_data(unit.Data(byte))

def parse_bss(self, tokens: List[str]):
Expand Down
5 changes: 4 additions & 1 deletion planner/asm/program_parser_test.py
Original file line number Diff line number Diff line change
Expand Up @@ -15,7 +15,7 @@
movc R3, 1
loop:
cmp R1, R2
jeq loop_exit
jz loop_exit
add R1, R3
mov [last_value], R1
out 0x00, R1
Expand All @@ -26,6 +26,9 @@
section .data
last_value db 0

section .bss
no_use: resb 32

""".splitlines()

class AsmParserTest(TestCase):
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