Add hypervisor support for PrivRw#540
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lz-bro wants to merge 1 commit intoriscv-software-src:masterfrom
Open
Add hypervisor support for PrivRw#540lz-bro wants to merge 1 commit intoriscv-software-src:masterfrom
lz-bro wants to merge 1 commit intoriscv-software-src:masterfrom
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@aswaterman Would you kindly take a look? |
aswaterman
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Nov 12, 2024
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aswaterman
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I'm not familiar with this code, so I'd rather @aap-sc, @en-sc, or @timsifive sign off on this.
en-sc
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Nov 12, 2024
debug/gdbserver.py
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| # It may be affected by reset halt | ||
| misa = self.gdb.p(f"$misa=0x{self.hart.misa:x}") |
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I don't quite get it. Which part is responsible for setting misa.H?
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When the power is turned on, the hart starts executing the brom code. Here does not affect this case, repeated testing will affect CheckMisa.
debug/gdbserver.py
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| self.supported.add(4) | ||
| self.supported.add(5) |
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AFAIU, H extension does not require presence of both S and U extensions.
Therefore, I'd suggest something like:
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| self.supported.add(4) | |
| self.supported.add(5) | |
| self.supported_vmodes = self.supported | |
| else: | |
| self.supported_vmodes = None |
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@en-sc I made a few changes, could you pelase take a look? |
Change-Id: I635a8f86b407f104ea74f00f4aefa1ce8170cb2d
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Change-Id: I635a8f86b407f104ea74f00f4aefa1ce8170cb2d