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    163 repositories

    • opentitan

      Public
      OpenTitan: Open source silicon root of trust
      SystemVerilog
      •
      Apache License 2.0
      •1.1k•3.6k•1.6k•406•Updated Aug 30, 2026Aug 30, 2026

    • lowrisc-toolchains

      Public
      UNSUPPORTED INTERNAL toolchain builds
      Shell
      •22•49•3•1•Updated Aug 30, 2026Aug 30, 2026

    • opentitan-provisioning

      Public
      Reference OpenTitan Provisioning Infrastructure
      Go
      •
      Apache License 2.0
      •13•16•18•3•Updated Aug 29, 2026Aug 29, 2026

    • mocha

      Public
      CHERI-enabled secure enclave that can be integrated as a subsytem on a system on chip.
      SystemVerilog
      •20•35•129•23•Updated Aug 28, 2026Aug 28, 2026

    • verilator

      Public
      Verilator open-source SystemVerilog simulator and lint system
      SystemVerilog
      •
      Other
      •888•1•0•0•Updated Aug 27, 2026Aug 27, 2026

    • dvsim

      Public
      DVSim is a build and run system written in Python that runs a variety of EDA tool flows
      Python
      •
      Apache License 2.0
      •21•13•37•3•Updated Aug 25, 2026Aug 25, 2026

    • ibex

      Public
      Ibex is a small 32-bit RISC-V CPU core with high-level of verification (previously known as zero-riscy)
      hardwarerisc-vrv32
      hardwarerisc-vrv32cpucorelowrisc-ibexlowrisc
      SystemVerilog
      •
      Apache License 2.0
      •797•2k•204•47•Updated Aug 20, 2026Aug 20, 2026

    • opentitan-signing-infra

      Public
      Signing Infrastructure & Tooling for OpenTitan
      Rust
      •
      Apache License 2.0
      •2•0•0•3•Updated Aug 18, 2026Aug 18, 2026

    • ot-sku

      Public
      OT SKUs
      Starlark
      •6•0•2•3•Updated Aug 17, 2026Aug 17, 2026

    • lowrisc-nix

      Public
      lowRISC Nix Packages and Environments
      Nix
      •
      MIT License
      •12•9•1•0•Updated Aug 10, 2026Aug 10, 2026

    • container-hotplug

      Public
      Hot-plug devices into a Docker container as they are plugged.
      Rust
      •6•16•2•0•Updated Aug 10, 2026Aug 10, 2026

    • qemu

      Public
      Fork of QEMU for development of lowRISC platforms (including OpenTitan)
      C
      •
      Other
      •7.1k•9•12•6•Updated Jul 30, 2026Jul 30, 2026

    • wycheproof

      Public
      Mirror of https://github.com/google/wycheproof.
      Go
      •
      Apache License 2.0
      •333•0•0•0•Updated Jul 28, 2026Jul 28, 2026

    • ethernet

      Public
      Open-source memory-mapped Ethernet MAC for FPGA with RGMII interface
      SystemVerilog
      •12•22•10•0•Updated Jul 27, 2026Jul 27, 2026

    • github-security-advsiory-trial

      Public
      A temporary repository to trial the GitHub Security Advsiory infrastructure
      Apache License 2.0
      •1•0•0•0•Updated Jul 24, 2026Jul 24, 2026

    • ftditool

      Public
      A C++ implementation for SPI Flash and GPIO leveraging FTDI MPSSE-enabled chips.
      C++
      •
      Other
      •3•3•0•0•Updated Jul 22, 2026Jul 22, 2026

    • u-boot

      Public
      "Das U-Boot" Source Tree
      C
      •4.6k•1•0•0•Updated Jul 17, 2026Jul 17, 2026

    • ci-actions

      Public
      Reuseable Github Actions for CI workflows in lowRISC projects.
      MIT License
      •0•0•0•0•Updated Jul 17, 2026Jul 17, 2026

    • ibex-demo-system

      Public
      A demo system for Ibex including debug support and some peripherals
      C
      •
      Apache License 2.0
      •84•99•12•7•Updated Jul 16, 2026Jul 16, 2026

    • llvm-project

      Public
      The LLVM Project is a collection of modular and reusable compiler and toolchain technologies. Note: the repository does not accept github pull requests at this …
      C++
      •18k•2•0•0•Updated Jul 10, 2026Jul 10, 2026

    • style-guides

      Public
      lowRISC Style Guides
      Creative Commons Attribution 4.0 International
      •131•532•19•2•Updated Jul 8, 2026Jul 8, 2026

    • part-number-registry

      Public
      Registry of various part number and ID namespaces that lowRISC controls
      Apache License 2.0
      •1•1•0•0•Updated Jul 7, 2026Jul 7, 2026

    • sail-cheri-riscv

      Public
      CHERI-RISC-V model written in Sail
      Isabelle
      •
      Other
      •25•0•0•0•Updated Jun 28, 2026Jun 28, 2026

    • sail-riscv

      Public
      Sail RISC-V model
      Coq
      •
      Other
      •291•0•0•1•Updated Jun 28, 2026Jun 28, 2026

    • opensbi

      Public
      OpenSBI with CHERI-RISC-V support
      7•0•0•0•Updated Jun 24, 2026Jun 24, 2026

    • busybox

      Public
      Provide a CHERI-enabled busybox port to support minimal Linux userspace builds.
      C
      •
      Other
      •4•0•0•0•Updated Jun 24, 2026Jun 24, 2026

    • linux

      Public
      Linux kernel source tree
      C
      •
      Other
      •64k•1•0•1•Updated Jun 24, 2026Jun 24, 2026

    • compile-to-core

      Public
      A simple converter that turns a compile.yml file into a FuseSoC core
      Python
      •
      Apache License 2.0
      •1•0•0•0•Updated Jun 11, 2026Jun 11, 2026

    • sonata-software

      Public
      Software, build flows and examples for the Sonata System
      C++
      •
      Apache License 2.0
      •16•14•3•1•Updated Jun 1, 2026Jun 1, 2026

    • riscv-isa-sim

      Public
      RISC-V Functional ISA Simulator
      C
      •
      Other
      •1.1k•20•0•2•Updated May 28, 2026May 28, 2026
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