|
1 | 1 | { |
2 | 2 | "Header": { |
3 | | - "Copyright": "Copyright (c) 2001 - 2025 Intel Corporation. All rights reserved.", |
4 | | - "Info": "Performance Monitoring Events for Intel(R) Xeon(R) 6 Processor with E-cores - V1.14", |
5 | | - "DatePublished": "11/19/2025", |
6 | | - "Version": "1.14", |
| 3 | + "Copyright": "Copyright (c) 2001 - 2026 Intel Corporation. All rights reserved.", |
| 4 | + "Info": "Performance Monitoring Events for Intel(R) Xeon(R) 6 Processor with E-cores - V1.15", |
| 5 | + "DatePublished": "01/13/2026", |
| 6 | + "Version": "1.15", |
7 | 7 | "Legend": "" |
8 | 8 | }, |
9 | 9 | "Events": [ |
10 | 10 | { |
11 | 11 | "EventCode": "0x00", |
12 | 12 | "UMask": "0x01", |
13 | 13 | "EventName": "INST_RETIRED.ANY", |
14 | | - "BriefDescription": "Fixed Counter: Counts the number of instructions retired", |
15 | | - "PublicDescription": "Fixed Counter: Counts the number of instructions retired", |
| 14 | + "BriefDescription": "Fixed Counter: Counts the number of instructions retired.", |
| 15 | + "PublicDescription": "Fixed Counter: Counts the number of instructions retired.", |
16 | 16 | "Counter": "Fixed counter 0", |
17 | 17 | "PEBScounters": "32", |
18 | 18 | "SampleAfterValue": "2000003", |
|
36 | 36 | "EventCode": "0x00", |
37 | 37 | "UMask": "0x02", |
38 | 38 | "EventName": "CPU_CLK_UNHALTED.CORE", |
39 | | - "BriefDescription": "Fixed Counter: Counts the number of unhalted core clock cycles", |
40 | | - "PublicDescription": "Fixed Counter: Counts the number of unhalted core clock cycles", |
| 39 | + "BriefDescription": "Fixed Counter: Counts the number of unhalted core clock cycles. [This event is alias to CPU_CLK_UNHALTED.THREAD]", |
| 40 | + "PublicDescription": "Fixed Counter: Counts the number of unhalted core clock cycles. [This event is alias to CPU_CLK_UNHALTED.THREAD]", |
41 | 41 | "Counter": "Fixed counter 1", |
42 | 42 | "PEBScounters": "33", |
43 | 43 | "SampleAfterValue": "2000003", |
|
86 | 86 | "EventCode": "0x00", |
87 | 87 | "UMask": "0x03", |
88 | 88 | "EventName": "CPU_CLK_UNHALTED.REF_TSC", |
89 | | - "BriefDescription": "Fixed Counter: Counts the number of unhalted reference clock cycles", |
90 | | - "PublicDescription": "Fixed Counter: Counts the number of unhalted reference clock cycles", |
| 89 | + "BriefDescription": "Fixed Counter: Counts the number of unhalted reference clock cycles.", |
| 90 | + "PublicDescription": "Fixed Counter: Counts the number of unhalted reference clock cycles.", |
91 | 91 | "Counter": "Fixed counter 2", |
92 | 92 | "PEBScounters": "34", |
93 | 93 | "SampleAfterValue": "2000003", |
|
4482 | 4482 | "PDISTCounter": "NA", |
4483 | 4483 | "Speculative": "0" |
4484 | 4484 | }, |
| 4485 | + { |
| 4486 | + "EventCode": "0xe0", |
| 4487 | + "UMask": "0x02", |
| 4488 | + "EventName": "MISC_RETIRED1.LFENCE", |
| 4489 | + "BriefDescription": "Counts the number of LFENCE instructions retired.", |
| 4490 | + "PublicDescription": "Counts the number of LFENCE instructions retired.", |
| 4491 | + "Counter": "0,1,2,3,4,5,6,7", |
| 4492 | + "PEBScounters": "0,1,2,3,4,5,6,7", |
| 4493 | + "SampleAfterValue": "1000003", |
| 4494 | + "MSRIndex": "0x00", |
| 4495 | + "MSRValue": "0x00", |
| 4496 | + "Precise": "1", |
| 4497 | + "CollectPEBSRecord": "2", |
| 4498 | + "TakenAlone": "0", |
| 4499 | + "CounterMask": "0", |
| 4500 | + "Invert": "0", |
| 4501 | + "EdgeDetect": "0", |
| 4502 | + "Data_LA": "0", |
| 4503 | + "L1_Hit_Indication": "0", |
| 4504 | + "Errata": "null", |
| 4505 | + "Offcore": "0", |
| 4506 | + "Deprecated": "0", |
| 4507 | + "PDISTCounter": "NA", |
| 4508 | + "Speculative": "0" |
| 4509 | + }, |
| 4510 | + { |
| 4511 | + "EventCode": "0xe0", |
| 4512 | + "UMask": "0xff", |
| 4513 | + "EventName": "MISC_RETIRED1.CL_INST", |
| 4514 | + "BriefDescription": "Counts the number of CLFLUSH, CLWB, and CLDEMOTE instructions retired.", |
| 4515 | + "PublicDescription": "Counts the number of CLFLUSH, CLWB, and CLDEMOTE instructions retired.", |
| 4516 | + "Counter": "0,1,2,3,4,5,6,7", |
| 4517 | + "PEBScounters": "0,1,2,3,4,5,6,7", |
| 4518 | + "SampleAfterValue": "1000003", |
| 4519 | + "MSRIndex": "0x00", |
| 4520 | + "MSRValue": "0x00", |
| 4521 | + "Precise": "1", |
| 4522 | + "CollectPEBSRecord": "2", |
| 4523 | + "TakenAlone": "0", |
| 4524 | + "CounterMask": "0", |
| 4525 | + "Invert": "0", |
| 4526 | + "EdgeDetect": "0", |
| 4527 | + "Data_LA": "0", |
| 4528 | + "L1_Hit_Indication": "0", |
| 4529 | + "Errata": "null", |
| 4530 | + "Offcore": "0", |
| 4531 | + "Deprecated": "0", |
| 4532 | + "PDISTCounter": "NA", |
| 4533 | + "Speculative": "0" |
| 4534 | + }, |
| 4535 | + { |
| 4536 | + "EventCode": "0xe1", |
| 4537 | + "UMask": "0x10", |
| 4538 | + "EventName": "MISC_RETIRED2.KEYLOCKER_ACCESS", |
| 4539 | + "BriefDescription": "Counts the number of accesses to KeyLocker cache.", |
| 4540 | + "PublicDescription": "Counts the number of accesses to KeyLocker cache.", |
| 4541 | + "Counter": "0,1,2,3,4,5,6,7", |
| 4542 | + "PEBScounters": "0,1,2,3,4,5,6,7", |
| 4543 | + "SampleAfterValue": "1000003", |
| 4544 | + "MSRIndex": "0x00", |
| 4545 | + "MSRValue": "0x00", |
| 4546 | + "Precise": "1", |
| 4547 | + "CollectPEBSRecord": "2", |
| 4548 | + "TakenAlone": "0", |
| 4549 | + "CounterMask": "0", |
| 4550 | + "Invert": "0", |
| 4551 | + "EdgeDetect": "0", |
| 4552 | + "Data_LA": "0", |
| 4553 | + "L1_Hit_Indication": "0", |
| 4554 | + "Errata": "null", |
| 4555 | + "Offcore": "0", |
| 4556 | + "Deprecated": "0", |
| 4557 | + "PDISTCounter": "NA", |
| 4558 | + "Speculative": "0" |
| 4559 | + }, |
| 4560 | + { |
| 4561 | + "EventCode": "0xe1", |
| 4562 | + "UMask": "0x11", |
| 4563 | + "EventName": "MISC_RETIRED2.KEYLOCKER_MISS", |
| 4564 | + "BriefDescription": "Counts the number of misses to KeyLocker cache.", |
| 4565 | + "PublicDescription": "Counts the number of misses to KeyLocker cache.", |
| 4566 | + "Counter": "0,1,2,3,4,5,6,7", |
| 4567 | + "PEBScounters": "0,1,2,3,4,5,6,7", |
| 4568 | + "SampleAfterValue": "1000003", |
| 4569 | + "MSRIndex": "0x00", |
| 4570 | + "MSRValue": "0x00", |
| 4571 | + "Precise": "1", |
| 4572 | + "CollectPEBSRecord": "2", |
| 4573 | + "TakenAlone": "0", |
| 4574 | + "CounterMask": "0", |
| 4575 | + "Invert": "0", |
| 4576 | + "EdgeDetect": "0", |
| 4577 | + "Data_LA": "0", |
| 4578 | + "L1_Hit_Indication": "0", |
| 4579 | + "Errata": "null", |
| 4580 | + "Offcore": "0", |
| 4581 | + "Deprecated": "0", |
| 4582 | + "PDISTCounter": "NA", |
| 4583 | + "Speculative": "0" |
| 4584 | + }, |
4485 | 4585 | { |
4486 | 4586 | "EventCode": "0xe4", |
4487 | 4587 | "UMask": "0x01", |
|
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