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retire MPL dataflow-driven mechanism #3836

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retire MPL dataflow-driven mechanism #3836

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fd838c7
retire RTLMP_DATA_FLOW_DRIVEN
AcKoucher Jan 23, 2026
363c831
update OR
AcKoucher Jan 23, 2026
88c5cc1
update private metrics for MPL data flow removal
AcKoucher Jan 26, 2026
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2 changes: 0 additions & 2 deletions docs/user/FlowVariables.md
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Original file line number Diff line number Diff line change
Expand Up @@ -202,7 +202,6 @@ configuration file.
| <a name="RTLMP_AREA_WT"></a>RTLMP_AREA_WT| Weight for the area of the current floorplan.| 0.1|
| <a name="RTLMP_ARGS"></a>RTLMP_ARGS| Overrides all other RTL macro placer arguments.| |
| <a name="RTLMP_BOUNDARY_WT"></a>RTLMP_BOUNDARY_WT| Weight for the boundary or how far the hard macro clusters are from boundaries.| 50.0|
| <a name="RTLMP_DATA_FLOW_DRIVEN"></a>RTLMP_DATA_FLOW_DRIVEN| Specifies whether the macro placer should use data-flow driven macro placement. Data-flow driven works by adding a wire length component that takes into account the data paths of the design. This optional can increase run time significantly for large designs.| 1|
| <a name="RTLMP_FENCE_LX"></a>RTLMP_FENCE_LX| Defines the lower left X coordinate for the global fence bounding box in microns.| 0.0|
| <a name="RTLMP_FENCE_LY"></a>RTLMP_FENCE_LY| Defines the lower left Y coordinate for the global fence bounding box in microns.| 0.0|
| <a name="RTLMP_FENCE_UX"></a>RTLMP_FENCE_UX| Defines the upper right X coordinate for the global fence bounding box in microns.| 0.0|
Expand Down Expand Up @@ -351,7 +350,6 @@ configuration file.
- [RTLMP_AREA_WT](#RTLMP_AREA_WT)
- [RTLMP_ARGS](#RTLMP_ARGS)
- [RTLMP_BOUNDARY_WT](#RTLMP_BOUNDARY_WT)
- [RTLMP_DATA_FLOW_DRIVEN](#RTLMP_DATA_FLOW_DRIVEN)
- [RTLMP_FENCE_LX](#RTLMP_FENCE_LX)
- [RTLMP_FENCE_LY](#RTLMP_FENCE_LY)
- [RTLMP_FENCE_UX](#RTLMP_FENCE_UX)
Expand Down
14 changes: 7 additions & 7 deletions flow/designs/gf12/bp_single/rules-base.json
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Original file line number Diff line number Diff line change
Expand Up @@ -32,15 +32,15 @@
"compare": ">="
},
"cts__timing__setup__tns": {
"value": -1510.0,
"value": -400.0,
"compare": ">="
},
"cts__timing__hold__ws": {
"value": -310.0,
"value": -306.0,
"compare": ">="
},
"cts__timing__hold__tns": {
"value": -750.0,
"value": -4360.0,
"compare": ">="
},
"globalroute__antenna_diodes_count": {
Expand All @@ -56,11 +56,11 @@
"compare": ">="
},
"globalroute__timing__hold__ws": {
"value": -310.0,
"value": -187.0,
"compare": ">="
},
"globalroute__timing__hold__tns": {
"value": -1540.0,
"value": -2360.0,
"compare": ">="
},
"detailedroute__route__wirelength": {
Expand All @@ -84,11 +84,11 @@
"compare": ">="
},
"finish__timing__setup__tns": {
"value": -931.0,
"value": -507.0,
"compare": ">="
},
"finish__timing__hold__ws": {
"value": -105.0,
"value": -100.0,
"compare": ">="
},
"finish__timing__hold__tns": {
Expand Down
4 changes: 2 additions & 2 deletions flow/designs/gf12/swerv_wrapper/rules-base.json
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Original file line number Diff line number Diff line change
Expand Up @@ -28,11 +28,11 @@
"compare": "<="
},
"cts__timing__setup__ws": {
"value": -75.0,
"value": -250.0,
"compare": ">="
},
"cts__timing__setup__tns": {
"value": -300.0,
"value": -1170.0,
"compare": ">="
},
"cts__timing__hold__ws": {
Expand Down
10 changes: 5 additions & 5 deletions flow/designs/rapidus2hp/cva6/rules-base.json
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Original file line number Diff line number Diff line change
Expand Up @@ -32,15 +32,15 @@
"compare": ">="
},
"cts__timing__setup__tns": {
"value": -10.2,
"value": -32.7,
"compare": ">="
},
"cts__timing__hold__ws": {
"value": -0.0627,
"value": -0.0275,
"compare": ">="
},
"cts__timing__hold__tns": {
"value": -1.33,
"value": -0.11,
"compare": ">="
},
"globalroute__antenna_diodes_count": {
Expand All @@ -52,7 +52,7 @@
"compare": ">="
},
"globalroute__timing__setup__tns": {
"value": -323.0,
"value": -306.0,
"compare": ">="
},
"globalroute__timing__hold__ws": {
Expand All @@ -68,7 +68,7 @@
"compare": ">="
},
"finish__timing__setup__tns": {
"value": -323.0,
"value": -306.0,
"compare": ">="
},
"finish__timing__hold__ws": {
Expand Down
4 changes: 2 additions & 2 deletions flow/designs/rapidus2hp/cva6/rules-verific.json
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Original file line number Diff line number Diff line change
Expand Up @@ -52,7 +52,7 @@
"compare": ">="
},
"globalroute__timing__setup__tns": {
"value": -136.0,
"value": -161.0,
"compare": ">="
},
"globalroute__timing__hold__ws": {
Expand All @@ -68,7 +68,7 @@
"compare": ">="
},
"finish__timing__setup__tns": {
"value": -136.0,
"value": -161.0,
"compare": ">="
},
"finish__timing__hold__ws": {
Expand Down
4 changes: 0 additions & 4 deletions flow/scripts/macro_place_util.tcl
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Original file line number Diff line number Diff line change
Expand Up @@ -60,10 +60,6 @@ if { [find_macros] != "" } {

append additional_rtlmp_args " -target_util [place_density_with_lb_addon]"

if { $::env(RTLMP_DATA_FLOW_DRIVEN) } {
append additional_rtlmp_args " -data_flow_driven"
}

set all_args $additional_rtlmp_args

if { [env_var_exists_and_non_empty RTLMP_ARGS] } {
Expand Down
9 changes: 0 additions & 9 deletions flow/scripts/variables.yaml
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Expand Up @@ -1165,15 +1165,6 @@ RTLMP_FENCE_UY:
default: 0.0
stages:
- floorplan
RTLMP_DATA_FLOW_DRIVEN:
description: >
Specifies whether the macro placer should use data-flow driven macro placement.
Data-flow driven works by adding a wire length component that takes into account
the data paths of the design. This optional can increase run time significantly
for large designs.
default: 1
stages:
- floorplan
RTLMP_ARGS:
description: >
Overrides all other RTL macro placer arguments.
Expand Down
2 changes: 1 addition & 1 deletion tools/OpenROAD
Open in desktop
Submodule OpenROAD updated 88 files
+3 −3 .bazelrc
+18 −0 BUILD.bazel
+0 −7 CMakeLists.txt
+24 −0 bazel/notification.bzl
+2 −1 src/cts/src/TritonCTS.cpp
+3 −0 src/cts/test/gated_clock4.ok
+3 −0 src/cts/test/hier_insertion_delay.ok
+3 −0 src/cts/test/simple_test_hier.ok
+3 −0 src/dbSta/test/escape_slash.ok
+3 −0 src/dbSta/test/escape_slash_hier.ok
+2 −0 src/gpl/README.md
+1 −0 src/gpl/include/gpl/Replace.h
+6 −19 src/gpl/src/nesterovPlace.cpp
+1 −3 src/gpl/src/nesterovPlace.h
+57 −29 src/gpl/src/placerBase.cpp
+4 −3 src/gpl/src/placerBase.h
+2 −0 src/gpl/src/replace.i
+2 −0 src/gpl/src/replace.tcl
+14 −1 src/gpl/src/routeBase.cpp
+3 −0 src/gpl/src/routeBase.h
+3 −0 src/gpl/test/ar01.ok
+3 −0 src/gpl/test/ar02.ok
+3 −0 src/gpl/test/cluster_place01.ok
+3 −0 src/gpl/test/convergence01.ok
+3 −0 src/gpl/test/core01.ok
+3 −0 src/gpl/test/diverge01.ok
+3 −0 src/gpl/test/error01.ok
+3 −0 src/gpl/test/incremental01.ok
+3 −0 src/gpl/test/incremental02.ok
+3 −0 src/gpl/test/large01.ok
+3 −0 src/gpl/test/large02.ok
+3 −0 src/gpl/test/macro01.ok
+3 −0 src/gpl/test/macro02.ok
+3 −0 src/gpl/test/macro03.ok
+3 −0 src/gpl/test/medium01.ok
+3 −0 src/gpl/test/medium02.ok
+3 −0 src/gpl/test/medium03.ok
+3 −0 src/gpl/test/medium04.ok
+3 −0 src/gpl/test/medium05.ok
+3 −0 src/gpl/test/medium06.ok
+3 −0 src/gpl/test/nograd01.ok
+3 −0 src/gpl/test/region01.ok
+3 −0 src/gpl/test/simple01-obs.ok
+3 −0 src/gpl/test/simple01-rd.ok
+3 −0 src/gpl/test/simple01-ref.ok
+3 −0 src/gpl/test/simple01-skip-io.ok
+3 −0 src/gpl/test/simple01-td-tune.ok
+3 −0 src/gpl/test/simple01-td.ok
+3 −0 src/gpl/test/simple01-uniform.ok
+3 −0 src/gpl/test/simple01.ok
+3 −0 src/gpl/test/simple02-rd.ok
+3 −0 src/gpl/test/simple02.ok
+3 −0 src/gpl/test/simple03-rd.ok
+3 −0 src/gpl/test/simple03.ok
+3 −0 src/gpl/test/simple04-rd.ok
+3 −0 src/gpl/test/simple04.ok
+3 −0 src/gpl/test/simple05.ok
+3 −0 src/gpl/test/simple06.ok
+3 −0 src/gpl/test/simple07.ok
+3 −0 src/gpl/test/simple08.ok
+3 −0 src/gpl/test/simple09.ok
+3 −0 src/gpl/test/simple10.ok
+234 −166 src/gui/src/layoutViewer.cpp
+5 −2 src/gui/src/layoutViewer.h
+12 −15 src/gui/src/mainWindow.cpp
+1 −2 src/mpl/include/mpl/rtl_mp.h
+0 −440 src/mpl/src/clusterEngine.cpp
+0 −74 src/mpl/src/clusterEngine.h
+0 −5 src/mpl/src/hier_rtlmp.cpp
+0 −1 src/mpl/src/hier_rtlmp.h
+2 −4 src/mpl/src/mpl.i
+2 −4 src/mpl/src/mpl.tcl
+1 −5 src/mpl/src/rtl_mp.cpp
+12 −0 src/odb/test/replace_hier_mod1.ok
+3 −0 src/rsz/test/buffer_ports10.ok
+3 −0 src/rsz/test/buffer_ports8.ok
+3 −0 src/rsz/test/buffer_ports9.ok
+3 −0 src/rsz/test/pinswap_flat.ok
+3 −0 src/rsz/test/pinswap_hier.ok
+3 −0 src/rsz/test/repair_fanout1_hier.ok
+3 −0 src/rsz/test/repair_fanout2_hier.ok
+3 −0 src/rsz/test/repair_fanout3_hier.ok
+3 −0 src/rsz/test/repair_setup4_flat.ok
+3 −0 src/rsz/test/repair_setup4_hier.ok
+3 −0 src/rsz/test/replace_arith_modules3.ok
+3 −0 src/rsz/test/split_load_hier.ok
+3 −0 test/upf_aes.ok
+3 −0 test/upf_test.ok