Designed an 8-bit shift register capable of performing both serial-in/parallel-out (SIPO) and parallelin/ parallel-out (PIPO) operations, controlled by an asynchronous select signal. The design uses TSPC (True Single-Phase Clock) D flip-flops along with 2x1 multiplexers.
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designed an 8-bit shift register capable of performing both serial-in/parallel-out (SIPO) and parallelin/ parallel-out (PIPO) operations, controlled by an asynchronous select signal. The design uses TSPC (True Single-Phase Clock) D flip-flops along with 2x1 multiplexers.
HarshithR7/UniversalShiftRegister
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designed an 8-bit shift register capable of performing both serial-in/parallel-out (SIPO) and parallelin/ parallel-out (PIPO) operations, controlled by an asynchronous select signal. The design uses TSPC (True Single-Phase Clock) D flip-flops along with 2x1 multiplexers.
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