While reading the existing RP2040 flash code paths in machine_rp2040_rom.go, I noticed that flash_range_write, flash_erase_blocks, and flash_do_cmd disable interrupts on the calling core and perform XIP-related handling, but I do not see any explicit stopping or synchronization of the other core.
From this code, I can see handling such as:
- disabling interrupts on the calling core
- connecting internal flash
- exiting XIP mode
- flushing cache
- restoring XIP state afterwards
However, I do not see anything here that explicitly stops the other core or synchronizes with it.
So I wanted to ask:
Is cross-core synchronization considered unnecessary for these existing RP2040 flash operations?
Or is cross-core safety expected to be handled somewhere else?
Relevant code paths include:
flash_range_writeflash_erase_blocksflash_do_cmd
From the current code, it is hard to tell whether the lack of explicit cross-core handling is intentional or simply not implemented here.
While reading the existing RP2040 flash code paths in
machine_rp2040_rom.go, I noticed thatflash_range_write,flash_erase_blocks, andflash_do_cmddisable interrupts on the calling core and perform XIP-related handling, but I do not see any explicit stopping or synchronization of the other core.From this code, I can see handling such as:
However, I do not see anything here that explicitly stops the other core or synchronizes with it.
So I wanted to ask:
Is cross-core synchronization considered unnecessary for these existing RP2040 flash operations?
Or is cross-core safety expected to be handled somewhere else?
Relevant code paths include:
flash_range_writeflash_erase_blocksflash_do_cmdFrom the current code, it is hard to tell whether the lack of explicit cross-core handling is intentional or simply not implemented here.