From 51e8890d9fb76c9a3395c7eb6bede947ef2ada17 Mon Sep 17 00:00:00 2001 From: Tim Hutt Date: Thu, 6 Nov 2025 10:59:10 +0000 Subject: [PATCH] Explain gateways and PLIC core Currently the spec just starts talking about gateways and PLIC core out of nowhere without explaining what they are. I thought they might be totally separate components, but actually they're just a way of talking about parts of the PLIC. --- riscv-plic.adoc | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/riscv-plic.adoc b/riscv-plic.adoc index a850f76..abb5e87 100644 --- a/riscv-plic.adoc +++ b/riscv-plic.adoc @@ -101,6 +101,11 @@ image::PLIC.jpg[400,432,align="center"] === Interrupt Gateways +The PLIC is composed of two sub-components (see <>): + +* Gateways +* PLIC Core + The interrupt gateways are responsible for converting global interrupt signals into a common interrupt request format, and for controlling the flow of interrupt requests to the PLIC core. At most one interrupt request per interrupt source can @@ -224,6 +229,7 @@ General PLIC operation parameter register blocks are defined in this spec, those Below is the figure of PLIC Operation Parameter Block Diagram, +[#plic-block-diagram] .PLIC Operation Parameter Block Diagram image::PLICArch.jpg[align="center"]