@@ -1851,12 +1851,6 @@ static int xtensa_poll(struct target *target)
18511851 esp32 -> active_cpu = k - 1 ;
18521852 }
18531853 }
1854- // Handle special case when halt is send to the stalled active core.
1855- // We need to switch focus to another core in order to be able to run algorithms.
1856- if (target -> debug_reason == DBG_REASON_DBGRQ && (dsr [esp32 -> active_cpu ] & OCDDSR_RUNSTALLSAMPLE )) {
1857- LOG_DEBUG ("Received debug request on stalled active core %d. Switch active core." , (int )esp32 -> active_cpu );
1858- esp32 -> active_cpu = esp32 -> active_cpu == ESP32_PRO_CPU_ID ? ESP32_APP_CPU_ID : ESP32_PRO_CPU_ID ;
1859- }
18601854 for (size_t k = esp32 -> configured_cores_num ; k > 0 ; k -- ) {
18611855 if (halt_cause [k - 1 ] & DEBUGCAUSE_IC )
18621856 {
@@ -1879,6 +1873,16 @@ static int xtensa_poll(struct target *target)
18791873 esp32 -> active_cpu = k - 1 ;
18801874 }
18811875 }
1876+ // Handle special case when halt is send to the stalled active core.
1877+ // We need to switch focus to another core in order to be able to run algorithms.
1878+ if (dsr [esp32 -> active_cpu ] & OCDDSR_RUNSTALLSAMPLE ) {
1879+ LOG_WARNING ("Received debug request on stalled active core %d." , (int )esp32 -> active_cpu );
1880+ int other_core = esp32 -> active_cpu == ESP32_PRO_CPU_ID ? ESP32_APP_CPU_ID : ESP32_PRO_CPU_ID ;
1881+ if ((dsr [other_core ] & OCDDSR_RUNSTALLSAMPLE ) == 0 ) {
1882+ LOG_DEBUG ("Switch active core to %d." , other_core );
1883+ esp32 -> active_cpu = other_core ;
1884+ }
1885+ }
18821886 if (esp32 -> configured_cores_num > 1 ) {
18831887 LOG_INFO ("Target halted. PRO_CPU: PC=0x%08X %s APP_CPU: PC=0x%08X %s" ,
18841888 esp108_reg_get (& esp32 -> core_caches [0 ]-> reg_list [XT_REG_IDX_PC ]),
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