@@ -246,11 +246,6 @@ static int esp32p4_init_target(struct command_context *cmd_ctx,
246246 return ERROR_OK ;
247247}
248248
249- static inline uint32_t esp32p4_make_non_cachable_addr (uint32_t address )
250- {
251- return (address & ESP32P4_NON_CACHEABLE_OFFSET ) ? (address + ESP32P4_NON_CACHEABLE_OFFSET ) : address ;
252- }
253-
254249static int esp32p4_sync_cache (struct target * target , uint32_t op )
255250{
256251 int res ;
@@ -275,12 +270,10 @@ static int esp32p4_sync_cache(struct target *target, uint32_t op)
275270static int esp32p4_read_memory (struct target * target , target_addr_t address ,
276271 uint32_t size , uint32_t count , uint8_t * buffer )
277272{
278- /* TODO: check that do we still need the cache related things */
279273 if (ESP32P4_ADDRESS_IS_L2MEM (address )) {
280274 int res = esp32p4_sync_cache (target , ESP32P4_CACHE_SYNC_WRITEBACK );
281275 if (res != ERROR_OK )
282276 LOG_TARGET_WARNING (target , "Cache writeback failed! Read main memory anyway." );
283- address = esp32p4_make_non_cachable_addr (address );
284277 }
285278
286279 if (esp32p4_is_reserved_address (address )) {
@@ -297,11 +290,9 @@ static int esp32p4_write_memory(struct target *target, target_addr_t address,
297290{
298291 bool cache_invalidate = false;
299292
300- /* TODO: check that do we still need the cache related things */
301293 if (ESP32P4_ADDRESS_IS_L2MEM (address )) {
302294 /* write to main memory and invalidate cache */
303295 esp32p4_sync_cache (target , ESP32P4_CACHE_SYNC_WRITEBACK );
304- address = esp32p4_make_non_cachable_addr (address );
305296 cache_invalidate = true;
306297 }
307298
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