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target/esp32p4: remove cache address translation before read/write memory
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src/target/espressif/esp32p4.c

Lines changed: 0 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -246,11 +246,6 @@ static int esp32p4_init_target(struct command_context *cmd_ctx,
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return ERROR_OK;
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}
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249-
static inline uint32_t esp32p4_make_non_cachable_addr(uint32_t address)
250-
{
251-
return (address & ESP32P4_NON_CACHEABLE_OFFSET) ? (address + ESP32P4_NON_CACHEABLE_OFFSET) : address;
252-
}
253-
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static int esp32p4_sync_cache(struct target *target, uint32_t op)
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{
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int res;
@@ -275,12 +270,10 @@ static int esp32p4_sync_cache(struct target *target, uint32_t op)
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static int esp32p4_read_memory(struct target *target, target_addr_t address,
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uint32_t size, uint32_t count, uint8_t *buffer)
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{
278-
/* TODO: check that do we still need the cache related things */
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if (ESP32P4_ADDRESS_IS_L2MEM(address)) {
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int res = esp32p4_sync_cache(target, ESP32P4_CACHE_SYNC_WRITEBACK);
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if (res != ERROR_OK)
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LOG_TARGET_WARNING(target, "Cache writeback failed! Read main memory anyway.");
283-
address = esp32p4_make_non_cachable_addr(address);
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}
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if (esp32p4_is_reserved_address(address)) {
@@ -297,11 +290,9 @@ static int esp32p4_write_memory(struct target *target, target_addr_t address,
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{
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bool cache_invalidate = false;
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300-
/* TODO: check that do we still need the cache related things */
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if (ESP32P4_ADDRESS_IS_L2MEM(address)) {
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/* write to main memory and invalidate cache */
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esp32p4_sync_cache(target, ESP32P4_CACHE_SYNC_WRITEBACK);
304-
address = esp32p4_make_non_cachable_addr(address);
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cache_invalidate = true;
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}
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