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Merge pull request #5566 from wt/add_lpc55s16
Add LPC55S16 support.
2 parents b5b4c6f + 6e59ce3 commit 39d6367

8 files changed

Lines changed: 144 additions & 22 deletions

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embassy-nxp/Cargo.toml

Lines changed: 6 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -9,6 +9,7 @@ publish = false
99
[package.metadata.embassy]
1010
build = [
1111
{target = "thumbv8m.main-none-eabihf", features = ["defmt", "lpc55-core0"]},
12+
{target = "thumbv8m.main-none-eabihf", features = ["defmt", "lpc55s16"]},
1213
{target = "thumbv7em-none-eabihf", features = ["defmt", "mimxrt1011", "rt", "time-driver-pit"]},
1314
{target = "thumbv7em-none-eabihf", features = ["defmt", "mimxrt1062", "rt", "time-driver-pit"]},
1415
]
@@ -20,6 +21,7 @@ features = ["defmt", "unstable-pac" ] # TODO: Add time-driver-any, as both lpc55
2021

2122
flavors = [
2223
{ regex_feature = "lpc55-core0", target = "thumbv8m.main-none-eabihf" },
24+
{ regex_feature = "lpc55s16", target = "thumbv8m.main-none-eabihf" },
2325
{ regex_feature = "mimxrt.*", target = "thumbv7em-none-eabihf" },
2426
]
2527

@@ -38,13 +40,13 @@ embassy-time-queue-utils = { version = "0.3.0", path = "../embassy-time-queue-ut
3840
embedded-io = { version = "0.7.1" }
3941
embedded-hal-02 = { package = "embedded-hal", version = "0.2.6", features = ["unproven"] }
4042
## Chip dependencies
41-
nxp-pac = { version = "0.1.0", optional = true, git = "https://github.com/i509VCB/nxp-pac", rev = "af5122e1cbe1483833c5d2e5af96b26a34ed5d62"}
43+
nxp-pac = { version = "0.1.0", optional = true, git = "https://github.com/embassy-rs/nxp-pac", rev = "47dada0976da4114c348ea16f5ead31f38f36eea" }
4244

4345
imxrt-rt = { version = "0.1.7", optional = true, features = ["device"] }
4446

4547
[build-dependencies]
4648
cfg_aliases = "0.2.1"
47-
nxp-pac = { version = "0.1.0", git = "https://github.com/i509VCB/nxp-pac", rev = "af5122e1cbe1483833c5d2e5af96b26a34ed5d62", features = ["metadata"] }
49+
nxp-pac = { version = "0.1.0", git = "https://github.com/embassy-rs/nxp-pac", rev = "47dada0976da4114c348ea16f5ead31f38f36eea", features = ["metadata"] }
4850
proc-macro2 = "1.0.95"
4951
quote = "1.0.15"
5052

@@ -75,11 +77,13 @@ unstable-pac = []
7577
# This feature is unfortunately a hack around the fact that cfg_aliases cannot apply to the buildscript
7678
# that creates the aliases.
7779
_rt1xxx = []
80+
_lpc55 = []
7881

7982
# A timer driver is enabled.
8083
_time_driver = ["dep:embassy-time-driver", "dep:embassy-time-queue-utils"]
8184

8285
#! ### Chip selection features
8386
lpc55-core0 = ["nxp-pac/lpc55s69_cm33_core0"]
87+
lpc55s16 = ["nxp-pac/lpc55s16", "_lpc55"]
8488
mimxrt1011 = ["nxp-pac/mimxrt1011", "_rt1xxx", "dep:imxrt-rt"]
8589
mimxrt1062 = ["nxp-pac/mimxrt1062", "_rt1xxx", "dep:imxrt-rt"]

embassy-nxp/build.rs

Lines changed: 35 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -39,6 +39,10 @@ fn main() {
3939
rt1xxx: { any(feature = "mimxrt1011", feature = "mimxrt1062") },
4040
}
4141

42+
cfg_aliases! {
43+
lpc55: { any(feature = "lpc55s16", feature = "lpc55-core0") },
44+
}
45+
4246
eprintln!("chip: {chip_name}");
4347

4448
generate_code(&mut cfgs, &singletons);
@@ -292,7 +296,15 @@ fn impl_dma_channel(impls: &mut Vec<TokenStream>, peripheral: &Peripheral) {
292296
}
293297
}
294298

295-
fn impl_usart(impls: &mut Vec<TokenStream>, peripheral: &Peripheral) {
299+
fn impl_usart(cfgs: &mut common::CfgSet, impls: &mut Vec<TokenStream>, peripheral: &Peripheral) {
300+
cfgs.declare_all(&[
301+
"has_usart_txd_pins",
302+
"has_usart_rxd_pins",
303+
"has_usart_cts_pins",
304+
"has_usart_rts_pins",
305+
"has_usart_sck_pins",
306+
]);
307+
296308
let instance = Ident::new(peripheral.name, Span::call_site());
297309
let flexcomm = Ident::new(
298310
peripheral.flexcomm.expect("LPC55 must specify FLEXCOMM instance"),
@@ -306,8 +318,26 @@ fn impl_usart(impls: &mut Vec<TokenStream>, peripheral: &Peripheral) {
306318

307319
for signal in peripheral.signals {
308320
let r#macro = match signal.name {
309-
"TXD" => format_ident!("impl_usart_txd_pin"),
310-
"RXD" => format_ident!("impl_usart_rxd_pin"),
321+
"TXD" => {
322+
cfgs.enable("has_usart_txd_pins");
323+
format_ident!("impl_usart_txd_pin")
324+
}
325+
"RXD" => {
326+
cfgs.enable("has_usart_rxd_pins");
327+
format_ident!("impl_usart_rxd_pin")
328+
}
329+
"CTS" => {
330+
cfgs.enable("has_usart_cts_pins");
331+
format_ident!("impl_usart_cts_pin")
332+
}
333+
"RTS" => {
334+
cfgs.enable("has_usart_rts_pins");
335+
format_ident!("impl_usart_rts_pin")
336+
}
337+
"SCK" => {
338+
cfgs.enable("has_usart_sck_pins");
339+
format_ident!("impl_usart_sck_pin")
340+
}
311341
_ => unreachable!(),
312342
};
313343

@@ -369,7 +399,7 @@ fn impl_sct(impls: &mut Vec<TokenStream>, peripheral: &Peripheral) {
369399
}
370400
}
371401

372-
fn impl_peripherals(_cfgs: &mut common::CfgSet, _singletons: &[Singleton]) -> TokenStream {
402+
fn impl_peripherals(cfgs: &mut common::CfgSet, _singletons: &[Singleton]) -> TokenStream {
373403
let mut impls = Vec::new();
374404

375405
for peripheral in metadata::METADATA.peripherals.iter() {
@@ -382,7 +412,7 @@ fn impl_peripherals(_cfgs: &mut common::CfgSet, _singletons: &[Singleton]) -> To
382412
}
383413

384414
if peripheral.name.starts_with("USART") {
385-
impl_usart(&mut impls, peripheral);
415+
impl_usart(cfgs, &mut impls, peripheral);
386416
}
387417

388418
if peripheral.name.starts_with("SCT") {

embassy-nxp/src/dma.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
#![macro_use]
22
//! Direct Memory Access (DMA) driver.
33
4-
#[cfg_attr(feature = "lpc55-core0", path = "./dma/lpc55.rs")]
4+
#[cfg_attr(lpc55, path = "./dma/lpc55.rs")]
55
mod inner;
66
pub use inner::*;

embassy-nxp/src/gpio.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,7 @@
11
//! General purpose input/output (GPIO) driver.
22
#![macro_use]
33

4-
#[cfg_attr(feature = "lpc55-core0", path = "./gpio/lpc55.rs")]
4+
#[cfg_attr(lpc55, path = "./gpio/lpc55.rs")]
55
#[cfg_attr(rt1xxx, path = "./gpio/rt1xxx.rs")]
66
mod inner;
77
pub use inner::*;

embassy-nxp/src/lib.rs

Lines changed: 9 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -4,16 +4,16 @@
44
// This mod MUST go first, so that the others see its macros.
55
pub(crate) mod fmt;
66

7-
#[cfg(feature = "lpc55-core0")]
7+
#[cfg(lpc55)]
88
pub mod dma;
99
pub mod gpio;
10-
#[cfg(feature = "lpc55-core0")]
10+
#[cfg(lpc55)]
1111
pub mod pint;
12-
#[cfg(feature = "lpc55-core0")]
12+
#[cfg(lpc55)]
1313
pub mod pwm;
14-
#[cfg(feature = "lpc55-core0")]
14+
#[cfg(lpc55)]
1515
pub mod sct;
16-
#[cfg(feature = "lpc55-core0")]
16+
#[cfg(lpc55)]
1717
pub mod usart;
1818

1919
#[cfg(rt1xxx)]
@@ -25,7 +25,7 @@ mod iomuxc;
2525
mod time_driver;
2626

2727
// This mod MUST go last, so that it sees all the `impl_foo!` macros
28-
#[cfg_attr(feature = "lpc55-core0", path = "chips/lpc55.rs")]
28+
#[cfg_attr(lpc55, path = "chips/lpc55.rs")]
2929
#[cfg_attr(feature = "mimxrt1011", path = "chips/mimxrt1011.rs")]
3030
#[cfg_attr(feature = "mimxrt1062", path = "chips/mimxrt1062.rs")]
3131
mod chip;
@@ -154,10 +154,10 @@ pub fn init(_config: config::Config) -> Peripherals {
154154
pac::CCM.ccgr6().modify(|v| v.set_cg0(1));
155155
}
156156

157-
#[cfg(any(feature = "lpc55-core0", rt1xxx))]
157+
#[cfg(any(lpc55, rt1xxx))]
158158
gpio::init();
159159

160-
#[cfg(feature = "lpc55-core0")]
160+
#[cfg(lpc55)]
161161
{
162162
pint::init();
163163
pwm::Pwm::reset();
@@ -166,7 +166,7 @@ pub fn init(_config: config::Config) -> Peripherals {
166166
#[cfg(feature = "_time_driver")]
167167
time_driver::init();
168168

169-
#[cfg(feature = "lpc55-core0")]
169+
#[cfg(lpc55)]
170170
dma::init();
171171

172172
peripherals

embassy-nxp/src/pwm.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2,6 +2,6 @@
22

33
//! Pulse-Width Modulation (PWM) driver.
44
5-
#[cfg_attr(feature = "lpc55-core0", path = "./pwm/lpc55.rs")]
5+
#[cfg_attr(lpc55, path = "./pwm/lpc55.rs")]
66
mod inner;
77
pub use inner::*;

embassy-nxp/src/usart.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2,6 +2,6 @@
22

33
//! Universal Synchronous/Asynchronous Receiver/Transmitter (USART) driver.
44
5-
#[cfg_attr(feature = "lpc55-core0", path = "./usart/lpc55.rs")]
5+
#[cfg_attr(lpc55, path = "./usart/lpc55.rs")]
66
mod inner;
77
pub use inner::*;

embassy-nxp/src/usart/lpc55.rs

Lines changed: 90 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -704,9 +704,13 @@ impl<'d, M: Mode> Usart<'d, M> {
704704
w.set_enabletx(true);
705705
w.set_enablerx(true);
706706
});
707-
registers.cfg().modify(|w| w.set_enable(true));
707+
registers.cfg().modify(|w| {
708+
w.set_enable(true);
709+
});
708710

709-
registers.fifointenset().modify(|w| w.set_rxerr(true));
711+
registers.fifointenset().modify(|w| {
712+
w.set_rxerr(true);
713+
});
710714

711715
// Drain RX FIFO in case it still has some unrelevant data
712716
while registers.fifostat().read().rxnotempty() {
@@ -887,22 +891,63 @@ macro_rules! impl_usart_instance {
887891
};
888892
}
889893

894+
#[cfg(has_usart_txd_pins)]
890895
pub(crate) trait SealedTxPin<T: Instance>: crate::gpio::Pin {
891896
fn pin_func(&self) -> PioFunc;
892897
}
893898

899+
#[cfg(has_usart_rxd_pins)]
894900
pub(crate) trait SealedRxPin<T: Instance>: crate::gpio::Pin {
895901
fn pin_func(&self) -> PioFunc;
896902
}
897903

904+
#[cfg(has_usart_cts_pins)]
905+
pub(crate) trait SealedCtsPin<T: Instance>: crate::gpio::Pin {
906+
// TODO(wt): This needs to be wired up in the usart driver.
907+
#[allow(unused)]
908+
fn pin_func(&self) -> PioFunc;
909+
}
910+
911+
#[cfg(has_usart_rts_pins)]
912+
pub(crate) trait SealedRtsPin<T: Instance>: crate::gpio::Pin {
913+
// TODO(wt): This needs to be wired up in the usart driver.
914+
#[allow(unused)]
915+
fn pin_func(&self) -> PioFunc;
916+
}
917+
918+
#[cfg(has_usart_sck_pins)]
919+
pub(crate) trait SealedSckPin<T: Instance>: crate::gpio::Pin {
920+
// TODO(wt): This needs to be wired up in the usart driver.
921+
#[allow(unused)]
922+
fn pin_func(&self) -> PioFunc;
923+
}
924+
898925
/// Trait for TX pins.
926+
#[cfg(has_usart_txd_pins)]
899927
#[allow(private_bounds)]
900928
pub trait TxPin<T: Instance>: SealedTxPin<T> + crate::gpio::Pin {}
901929

902930
/// Trait for RX pins.
931+
#[cfg(has_usart_rxd_pins)]
903932
#[allow(private_bounds)]
904933
pub trait RxPin<T: Instance>: SealedRxPin<T> + crate::gpio::Pin {}
905934

935+
/// Trait for Cts pins.
936+
#[cfg(has_usart_cts_pins)]
937+
#[allow(private_bounds)]
938+
pub trait CtsPin<T: Instance>: SealedCtsPin<T> + crate::gpio::Pin {}
939+
940+
/// Trait for Rts pins.
941+
#[cfg(has_usart_rts_pins)]
942+
#[allow(private_bounds)]
943+
pub trait RtsPin<T: Instance>: SealedRtsPin<T> + crate::gpio::Pin {}
944+
945+
/// Trait for Sck pins.
946+
#[cfg(has_usart_sck_pins)]
947+
#[allow(private_bounds)]
948+
pub trait SckPin<T: Instance>: SealedSckPin<T> + crate::gpio::Pin {}
949+
950+
#[cfg(has_usart_txd_pins)]
906951
macro_rules! impl_usart_txd_pin {
907952
($pin:ident, $instance:ident, $func: ident) => {
908953
impl crate::usart::SealedTxPin<crate::peripherals::$instance> for crate::peripherals::$pin {
@@ -916,6 +961,7 @@ macro_rules! impl_usart_txd_pin {
916961
};
917962
}
918963

964+
#[cfg(has_usart_rxd_pins)]
919965
macro_rules! impl_usart_rxd_pin {
920966
($pin:ident, $instance:ident, $func: ident) => {
921967
impl crate::usart::SealedRxPin<crate::peripherals::$instance> for crate::peripherals::$pin {
@@ -929,6 +975,48 @@ macro_rules! impl_usart_rxd_pin {
929975
};
930976
}
931977

978+
#[cfg(has_usart_cts_pins)]
979+
macro_rules! impl_usart_cts_pin {
980+
($pin:ident, $instance:ident, $func: ident) => {
981+
impl crate::usart::SealedCtsPin<crate::peripherals::$instance> for crate::peripherals::$pin {
982+
fn pin_func(&self) -> crate::pac::iocon::vals::PioFunc {
983+
use crate::pac::iocon::vals::PioFunc;
984+
PioFunc::$func
985+
}
986+
}
987+
988+
impl crate::usart::CtsPin<crate::peripherals::$instance> for crate::peripherals::$pin {}
989+
};
990+
}
991+
992+
#[cfg(has_usart_rts_pins)]
993+
macro_rules! impl_usart_rts_pin {
994+
($pin:ident, $instance:ident, $func: ident) => {
995+
impl crate::usart::SealedRtsPin<crate::peripherals::$instance> for crate::peripherals::$pin {
996+
fn pin_func(&self) -> crate::pac::iocon::vals::PioFunc {
997+
use crate::pac::iocon::vals::PioFunc;
998+
PioFunc::$func
999+
}
1000+
}
1001+
1002+
impl crate::usart::RtsPin<crate::peripherals::$instance> for crate::peripherals::$pin {}
1003+
};
1004+
}
1005+
1006+
#[cfg(has_usart_sck_pins)]
1007+
macro_rules! impl_usart_sck_pin {
1008+
($pin:ident, $instance:ident, $func: ident) => {
1009+
impl crate::usart::SealedSckPin<crate::peripherals::$instance> for crate::peripherals::$pin {
1010+
fn pin_func(&self) -> crate::pac::iocon::vals::PioFunc {
1011+
use crate::pac::iocon::vals::PioFunc;
1012+
PioFunc::$func
1013+
}
1014+
}
1015+
1016+
impl crate::usart::SckPin<crate::peripherals::$instance> for crate::peripherals::$pin {}
1017+
};
1018+
}
1019+
9321020
/// Marker trait indicating a DMA channel may be used for USART transmit.
9331021
pub trait TxChannel<T: Instance>: crate::dma::Channel {}
9341022

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