|
1 | 1 | /*************************************************************************** |
2 | | - * Copyright (c) 2024 Microsoft Corporation |
3 | | - * |
| 2 | + * Copyright (c) 2024 Microsoft Corporation |
| 3 | + * |
4 | 4 | * This program and the accompanying materials are made available under the |
5 | 5 | * terms of the MIT License which is available at |
6 | 6 | * https://opensource.org/licenses/MIT. |
7 | | - * |
| 7 | + * |
8 | 8 | * SPDX-License-Identifier: MIT |
9 | 9 | **************************************************************************/ |
10 | 10 |
|
@@ -74,42 +74,42 @@ _tx_initialize_low_level: |
74 | 74 | /* Save the system stack pointer. */ |
75 | 75 | /* _tx_thread_system_stack_ptr = sp; */ |
76 | 76 | la t0, _tx_thread_system_stack_ptr |
77 | | - sd sp, 0(t0) /* Save system stack pointer */ |
| 77 | + sd sp, 0(t0) // Save system stack pointer |
78 | 78 |
|
79 | 79 | /* Pickup first free address. */ |
80 | 80 | /* _tx_initialize_unused_memory(__tx_free_memory_start); */ |
81 | | - la t0, __tx_free_memory_start /* Pickup first free address */ |
| 81 | + la t0, __tx_free_memory_start // Pickup first free address |
82 | 82 | la t1, _tx_initialize_unused_memory |
83 | | - sd t0, 0(t1) /* Save unused memory address */ |
| 83 | + sd t0, 0(t1) // Save unused memory address |
84 | 84 |
|
85 | 85 | /* Initialize floating point control/status register if floating point is enabled. */ |
86 | 86 | #ifdef __riscv_flen |
87 | 87 | li t0, 0 |
88 | | - csrw fcsr, t0 /* Clear FP control/status register */ |
| 88 | + csrw fcsr, t0 // Clear FP control/status register |
89 | 89 | #endif |
90 | 90 |
|
91 | 91 | ret |
92 | 92 |
|
93 | 93 | /* Timer Interrupt Handler Note: |
94 | 94 | Platform-specific implementations must provide their own timer ISR. |
95 | 95 | The timer interrupt handler should follow this execution flow: |
96 | | - |
| 96 | +
|
97 | 97 | 1. Disable interrupts (if not done by hardware exception entry) |
98 | 98 | 2. Allocate interrupt stack frame (65*8 bytes with FP, 32*8 bytes without) |
99 | 99 | 3. Save RA (x1) on the stack at offset 28*8 |
100 | 100 | 4. Call _tx_thread_context_save to save thread context |
101 | 101 | 5. Call _tx_timer_interrupt to process the timer tick |
102 | 102 | 6. Call _tx_thread_context_restore to resume execution (does not return) |
103 | | - |
| 103 | +
|
104 | 104 | Example (for CLINT timer): |
105 | | - |
| 105 | +
|
106 | 106 | _tx_timer_interrupt_handler: |
107 | | - addi sp, sp, -32*8 |
108 | | - sd ra, 28*8(sp) |
| 107 | + addi sp, sp, -32*8 |
| 108 | + sd ra, 28*8(sp) |
109 | 109 | call _tx_thread_context_save |
110 | 110 | call _tx_timer_interrupt |
111 | | - j _tx_thread_context_restore |
112 | | - |
| 111 | + j _tx_thread_context_restore |
| 112 | +
|
113 | 113 | The port assumes Machine mode (M-mode) execution. |
114 | 114 | For Supervisor mode (S-mode), use sstatus and SIE/SPIE instead of mstatus. |
115 | 115 | See the RISC-V Privileged Specification for more details. */ |
0 commit comments