Vulnerable File: `circuits/ctr.circom` commit: `4984d68467b87ddf14c2e725dcfb753be3c92528` Component `GenerateCounterBlocks ` will fail for edge cases (e.g., n=1), and `component ivByteInc[n-1][16]` will be ivByteInc[0][16].
Vulnerable File:
circuits/ctr.circomcommit:
4984d68467b87ddf14c2e725dcfb753be3c92528Component
GenerateCounterBlockswill fail for edge cases (e.g., n=1), andcomponent ivByteInc[n-1][16]will be ivByteInc[0][16].