Hey @cifertech, first off, thank you for open-sourcing the ESP32-DIV v2. It's an incredible project and your documentation is some of the best I've seen for a hobby RF tool.
I'm planning to have a couple of v2 boards assembled via JLCPCB's PCBA service since I'm new to SMD soldering. JLCPCB needs three files to assemble a board:
- ✅ Gerbers, included in
/PCB/ESP32DIV2-Gerber.zip
- ✅ BOM, included in
/Schematic/main-BOM.xls
- ❌ Pick-and-place / CPL file, not in the repo
Would you be willing to add the pick-and-place file to the repo (or to a release artifact)? Altium exports this directly from your .PcbDoc source. The menu path is typically File → Fabrication Outputs → Generates Pick and Place Files, output format CSV or TXT with columns: Designator, Layer, Center-X, Center-Y, Rotation.
This would unblock anyone trying to use JLCPCB PCBA (or any other PCBA service like PCBWay, Seeed Fusion, etc.) without needing to pay for manual setup or generate the file from scratch.
A few other things that would also help fellow PCBA users (entirely optional):
- The Altium PCB source files (
.PcbDoc, .SchDoc, .PrjPcb), like you did for the v1 beta in the Previous versions/ESP32-DIV beta/PCB/ folder. With these, anyone can regenerate the CPL themselves.
- A short note on the L1 inductor value (the boost converter for the IP5306). The v2 BOM lists the footprint as
L_57 but no inductance value. Reference designs for IP5306 typically use 4.7µH, could you confirm?
Either of these (CPL file alone, or full Altium source) would be hugely appreciated. Thanks again for the project!
Hey @cifertech, first off, thank you for open-sourcing the ESP32-DIV v2. It's an incredible project and your documentation is some of the best I've seen for a hobby RF tool.
I'm planning to have a couple of v2 boards assembled via JLCPCB's PCBA service since I'm new to SMD soldering. JLCPCB needs three files to assemble a board:
/PCB/ESP32DIV2-Gerber.zip/Schematic/main-BOM.xlsWould you be willing to add the pick-and-place file to the repo (or to a release artifact)? Altium exports this directly from your
.PcbDocsource. The menu path is typically File → Fabrication Outputs → Generates Pick and Place Files, output format CSV or TXT with columns: Designator, Layer, Center-X, Center-Y, Rotation.This would unblock anyone trying to use JLCPCB PCBA (or any other PCBA service like PCBWay, Seeed Fusion, etc.) without needing to pay for manual setup or generate the file from scratch.
A few other things that would also help fellow PCBA users (entirely optional):
.PcbDoc,.SchDoc,.PrjPcb), like you did for the v1 beta in thePrevious versions/ESP32-DIV beta/PCB/folder. With these, anyone can regenerate the CPL themselves.L_57but no inductance value. Reference designs for IP5306 typically use 4.7µH, could you confirm?Either of these (CPL file alone, or full Altium source) would be hugely appreciated. Thanks again for the project!