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precisionmoonprecisionmoon
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resolved merge conflict
Signed-off-by: Cho Moon <cmoon@precisioninno.com>
2 parents 41fff97 + 4810cd9 commit 28af78c

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38 files changed

+334
-175
lines changed

38 files changed

+334
-175
lines changed

‎docs/user/FlowVariables.md‎

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -202,7 +202,6 @@ configuration file.
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| <a name="RTLMP_AREA_WT"></a>RTLMP_AREA_WT| Weight for the area of the current floorplan.| 0.1|
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| <a name="RTLMP_ARGS"></a>RTLMP_ARGS| Overrides all other RTL macro placer arguments.| |
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| <a name="RTLMP_BOUNDARY_WT"></a>RTLMP_BOUNDARY_WT| Weight for the boundary or how far the hard macro clusters are from boundaries.| 50.0|
205-
| <a name="RTLMP_DATA_FLOW_DRIVEN"></a>RTLMP_DATA_FLOW_DRIVEN| Specifies whether the macro placer should use data-flow driven macro placement. Data-flow driven works by adding a wire length component that takes into account the data paths of the design. This optional can increase run time significantly for large designs.| 1|
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| <a name="RTLMP_FENCE_LX"></a>RTLMP_FENCE_LX| Defines the lower left X coordinate for the global fence bounding box in microns.| 0.0|
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| <a name="RTLMP_FENCE_LY"></a>RTLMP_FENCE_LY| Defines the lower left Y coordinate for the global fence bounding box in microns.| 0.0|
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| <a name="RTLMP_FENCE_UX"></a>RTLMP_FENCE_UX| Defines the upper right X coordinate for the global fence bounding box in microns.| 0.0|
@@ -213,7 +212,7 @@ configuration file.
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| <a name="RTLMP_MIN_AR"></a>RTLMP_MIN_AR| Specifies the minimum aspect ratio (height/width).| 0.33|
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| <a name="RTLMP_MIN_INST"></a>RTLMP_MIN_INST| Minimum number of standard cells in a cluster. If unset, rtl_macro_placer will calculate a value based on the design attributes.| |
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| <a name="RTLMP_MIN_MACRO"></a>RTLMP_MIN_MACRO| Minimum number of macros in a cluster. If unset, rtl_macro_placer will calculate a value based on the design attributes.| |
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| <a name="RTLMP_NOTCH_WT"></a>RTLMP_NOTCH_WT| Weight for the notch, or the existence of dead space that cannot be used for placement and routing.| 10.0|
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| <a name="RTLMP_NOTCH_WT"></a>RTLMP_NOTCH_WT| Weight for the notch, or the existence of dead space that cannot be used for placement and routing.| 50.0|
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| <a name="RTLMP_OUTLINE_WT"></a>RTLMP_OUTLINE_WT| Weight for violating the fixed outline constraint, meaning that all clusters should be placed within the shape of their parent cluster.| 100.0|
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| <a name="RTLMP_RPT_DIR"></a>RTLMP_RPT_DIR| Path to the directory where reports are saved.| |
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| <a name="RTLMP_WIRELENGTH_WT"></a>RTLMP_WIRELENGTH_WT| Weight for half-perimiter wirelength.| 100.0|
@@ -351,7 +350,6 @@ configuration file.
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- [RTLMP_AREA_WT](#RTLMP_AREA_WT)
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- [RTLMP_ARGS](#RTLMP_ARGS)
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- [RTLMP_BOUNDARY_WT](#RTLMP_BOUNDARY_WT)
354-
- [RTLMP_DATA_FLOW_DRIVEN](#RTLMP_DATA_FLOW_DRIVEN)
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- [RTLMP_FENCE_LX](#RTLMP_FENCE_LX)
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- [RTLMP_FENCE_LY](#RTLMP_FENCE_LY)
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- [RTLMP_FENCE_UX](#RTLMP_FENCE_UX)

‎flow/designs/asap7/riscv32i-mock-sram/rules-base.json‎

Lines changed: 11 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -36,35 +36,35 @@
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"compare": ">="
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},
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"cts__timing__hold__ws": {
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"value": -50.0,
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"value": -47.5,
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"compare": ">="
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},
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"cts__timing__hold__tns": {
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"value": -200.0,
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"value": -190.0,
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"compare": ">="
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},
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"globalroute__antenna_diodes_count": {
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"value": 100,
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"compare": "<="
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},
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"globalroute__timing__setup__ws": {
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"value": -51.5,
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"value": -104.0,
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"compare": ">="
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},
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"globalroute__timing__setup__tns": {
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"value": -202.0,
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"value": -1050.0,
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"compare": ">="
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},
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"globalroute__timing__hold__ws": {
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"value": -50.0,
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"value": -47.5,
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"compare": ">="
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},
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"globalroute__timing__hold__tns": {
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"value": -200.0,
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"value": -190.0,
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"compare": ">="
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},
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"detailedroute__route__wirelength": {
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"value": 84714,
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"value": 73284,
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"compare": "<="
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},
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"detailedroute__route__drc_errors": {
@@ -80,19 +80,19 @@
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"compare": "<="
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},
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"finish__timing__setup__ws": {
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"value": -50.0,
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"value": -128.0,
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"compare": ">="
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},
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"finish__timing__setup__tns": {
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"value": -200.0,
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"value": -12600.0,
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"compare": ">="
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},
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"finish__timing__hold__ws": {
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"value": -50.0,
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"value": -47.5,
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"compare": ">="
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},
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"finish__timing__hold__tns": {
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"value": -200.0,
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"value": -190.0,
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"compare": ">="
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},
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"finish__design__instance__area": {

‎flow/designs/asap7/riscv32i/config.mk‎

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Original file line numberDiff line numberDiff line change
@@ -14,8 +14,8 @@ ifeq ($(BLOCKS),)
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export ADDITIONAL_LIBS = $(LIB_DIR)/fakeram7_256x32.lib
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endif
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17-
export DIE_AREA = 0 0 80 90
18-
export CORE_AREA = 5 5 75 85
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export CORE_UTILIZATION = 62
18+
export CORE_MARGIN = 5
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2020
export PLACE_DENSITY_LB_ADDON = 0.10
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‎flow/designs/asap7/riscv32i/constraint.sdc‎

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Original file line numberDiff line numberDiff line change
@@ -2,7 +2,7 @@ current_design riscv_top
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set clk_name clk
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set clk_port_name clk
5-
set clk_period 1000
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set clk_period 950
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set clk_io_pct 0.125
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set clk_port [get_ports $clk_port_name]

‎flow/designs/asap7/riscv32i/rules-base.json‎

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Original file line numberDiff line numberDiff line change
@@ -36,11 +36,11 @@
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"compare": ">="
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},
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"cts__timing__hold__ws": {
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"value": -50.0,
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"value": -47.5,
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"compare": ">="
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},
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"cts__timing__hold__tns": {
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"value": -200.0,
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"value": -190.0,
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"compare": ">="
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},
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"globalroute__antenna_diodes_count": {
@@ -56,15 +56,15 @@
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"compare": ">="
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},
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"globalroute__timing__hold__ws": {
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"value": -50.0,
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"value": -47.5,
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"compare": ">="
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},
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"globalroute__timing__hold__tns": {
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"value": -200.0,
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"value": -190.0,
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"compare": ">="
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},
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"detailedroute__route__wirelength": {
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"value": 74215,
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"value": 70525,
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"compare": "<="
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},
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"detailedroute__route__drc_errors": {
@@ -84,15 +84,15 @@
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"compare": ">="
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},
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"finish__timing__setup__tns": {
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"value": -200.0,
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"value": -196.0,
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"compare": ">="
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},
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"finish__timing__hold__ws": {
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"value": -50.0,
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"value": -47.5,
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"compare": ">="
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},
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"finish__timing__hold__tns": {
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"value": -200.0,
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"value": -190.0,
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"compare": ">="
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},
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"finish__design__instance__area": {

‎flow/designs/asap7/swerv_wrapper/rules-base.json‎

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@@ -64,7 +64,7 @@
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"compare": ">="
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},
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"detailedroute__route__wirelength": {
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"value": 1585423,
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"value": 1826079,
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"compare": "<="
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},
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"detailedroute__route__drc_errors": {

‎flow/designs/gf12/bp_single/rules-base.json‎

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Original file line numberDiff line numberDiff line change
@@ -28,19 +28,19 @@
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"compare": "<="
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},
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"cts__timing__setup__ws": {
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"value": -100.0,
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"value": -296.0,
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"compare": ">="
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},
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"cts__timing__setup__tns": {
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"value": -400.0,
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"value": -4740.0,
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"compare": ">="
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},
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"cts__timing__hold__ws": {
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"value": -306.0,
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"value": -189.0,
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"compare": ">="
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},
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"cts__timing__hold__tns": {
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"value": -4360.0,
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"value": -489.0,
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"compare": ">="
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},
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"globalroute__antenna_diodes_count": {
@@ -60,7 +60,7 @@
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"compare": ">="
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},
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"globalroute__timing__hold__tns": {
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"value": -2360.0,
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"value": -1510.0,
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"compare": ">="
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},
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"detailedroute__route__wirelength": {

‎flow/designs/gf12/ca53/rules-base.json‎

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@@ -28,7 +28,7 @@
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"compare": ">="
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},
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"cts__timing__setup__tns": {
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"value": -400.0,
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"value": -904.0,
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"compare": ">="
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},
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"cts__timing__hold__ws": {
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"compare": ">="
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},
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"globalroute__timing__hold__tns": {
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"value": -793.0,
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"value": -524.0,
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"compare": ">="
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},
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"detailedroute__route__wirelength": {
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"compare": ">="
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},
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"finish__timing__hold__tns": {
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"value": -2640.0,
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"compare": ">="
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},
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"finish__design__instance__area": {

‎flow/designs/gf180/aes/config.mk‎

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Original file line numberDiff line numberDiff line change
@@ -6,7 +6,7 @@ export VERILOG_FILES = $(sort $(wildcard $(DESIGN_HOME)/src/$(DESIGN_NICKNAME)
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export SDC_FILE = $(DESIGN_HOME)/$(PLATFORM)/$(DESIGN_NICKNAME)/constraint.sdc
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export ABC_AREA = 1
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9-
export CORE_UTILIZATION = 35
9+
export CORE_UTILIZATION = 50
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export CORE_ASPECT_RATIO = 1
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export CORE_MARGIN = 2
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‎flow/designs/gf180/aes/rules-base.json‎

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@@ -12,7 +12,7 @@
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"compare": "<="
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},
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"placeopt__design__instance__count__stdcell": {
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"value": 24274,
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"value": 23788,
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"compare": "<="
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},
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"detailedplace__design__violations": {
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"compare": "<="
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},
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"cts__timing__setup__ws": {
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"value": -0.97,
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"value": -0.925,
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"compare": ">="
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},
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"cts__timing__setup__tns": {
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"value": -107.0,
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"value": -102.0,
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"compare": ">="
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},
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"cts__timing__hold__ws": {
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"compare": "<="
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},
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"globalroute__timing__setup__ws": {
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"value": -1.06,
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"compare": ">="
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},
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"globalroute__timing__setup__tns": {
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"value": -124.0,
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"value": -119.0,
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"compare": ">="
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},
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"globalroute__timing__hold__ws": {
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"compare": "<="
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},
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"finish__timing__setup__ws": {
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"value": -1.05,
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"value": -1.04,
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"compare": ">="
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},
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"finish__timing__setup__tns": {
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"value": -118.0,
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"value": -114.0,
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"compare": ">="
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},
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"finish__timing__hold__ws": {

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