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StrahinjaJacimovicStrahinjaJacimovic
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Merge pull request #573 from MikroElektronika/fix/bss-clearing
Added BSS memory region clearing for all Renesas Devices that didn't have it
2 parents a07bce0 + c6f66fa commit 7edd3c0

136 files changed

Lines changed: 2828 additions & 9098 deletions

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‎ARM/gcc_clang/cmake/renesas/ra0e2.cmake‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,7 @@
11
if(${MCU_NAME} MATCHES "^R7FA0E2073CFJ$|^R7FA0E2073CFL$|^R7FA0E2073CFM$|^R7FA0E2073CNE$|^R7FA0E2073CNH$|^R7FA0E2074CFJ$|^R7FA0E2074CFL$|^R7FA0E2074CFM$|^R7FA0E2074CNE$|^R7FA0E2074CNH$|^R7FA0E2093CFJ$|^R7FA0E2093CFL$|^R7FA0E2093CFM$|^R7FA0E2093CNE$|^R7FA0E2093CNH$|^R7FA0E2094CFJ$|^R7FA0E2094CFL$|^R7FA0E2094CFM$|^R7FA0E2094CNE$|^R7FA0E2094CNH$")
22
set(${linkerScript} linker_scripts/${vendor}/${TOOLCHAIN_ID}/${mcu_match}.ld PARENT_SCOPE)
33
set(${startupFile} startup/${vendor}/${mcu_match}.c PARENT_SCOPE)
4-
list(APPEND local_list_include system/src/renesas/ra0e2/init_clock.c)
5-
list(APPEND local_dir_install system/src/renesas/ra0e2/thirdparty/ra0e2)
4+
list(APPEND local_list_include system/src/${vendor}/ra0e2/init_clock.c)
5+
list(APPEND local_dir_install system/src/${vendor}/ra0e2/thirdparty/ra0e2)
66
set(${thirdpartyInstall} ra0e2/thirdparty/ra0e2 PARENT_SCOPE)
77
endif()

‎ARM/gcc_clang/linker_scripts/renesas/clang-llvm/r7fa0e1053cfj.ld‎

Lines changed: 0 additions & 58 deletions
Original file line numberDiff line numberDiff line change
@@ -30,54 +30,6 @@ ENTRY(Reset_Handler)
3030
SECTIONS
3131
{
3232
/***** DATA_FLASH memory section allocations ******/
33-
__etext = .;
34-
35-
/* Initialized data section. */
36-
.data :
37-
{
38-
__data_start__ = .;
39-
. = ALIGN(4);
40-
41-
__Code_In_RAM_Start = .;
42-
43-
KEEP(*(.code_in_ram*))
44-
__Code_In_RAM_End = .;
45-
46-
*(vtable)
47-
/* Don't use *(.data*) because it will place data meant for .data_flash in this section. */
48-
*(.data.*)
49-
*(.data)
50-
51-
. = ALIGN(4);
52-
/* preinit data */
53-
PROVIDE_HIDDEN (__preinit_array_start = .);
54-
KEEP(*(.preinit_array))
55-
PROVIDE_HIDDEN (__preinit_array_end = .);
56-
57-
. = ALIGN(4);
58-
/* init data */
59-
PROVIDE_HIDDEN (__init_array_start = .);
60-
KEEP(*(SORT(.init_array.*)))
61-
KEEP(*(.init_array))
62-
PROVIDE_HIDDEN (__init_array_end = .);
63-
64-
65-
. = ALIGN(4);
66-
/* finit data */
67-
PROVIDE_HIDDEN (__fini_array_start = .);
68-
KEEP(*(SORT(.fini_array.*)))
69-
KEEP(*(.fini_array))
70-
PROVIDE_HIDDEN (__fini_array_end = .);
71-
72-
KEEP(*(.jcr*))
73-
74-
. = ALIGN(4);
75-
76-
/* All data end */
77-
__data_end__ = .;
78-
79-
} > RAM AT > FLASH
80-
8133
.data_flash.startof :
8234
{
8335
__ddsc_DATA_FLASH_START = . ;
@@ -373,17 +325,7 @@ SECTIONS
373325
__ddsc_OPTION_SETTING_OSIS_END = . ;
374326
} > OPTION_SETTING_OSIS
375327

376-
.bss :
377-
{
378-
. = ALIGN(4);
379-
__bss_start__ = .;
380-
*(.bss*)
381-
*(COMMON)
382-
. = ALIGN(4);
383-
__bss_end__ = .;
384-
} > RAM
385328
}
386-
387329
PROVIDE( __tls_base = ADDR(__ram_tdata$$) );
388330
PROVIDE( __tdata_source = LOADADDR(__ram_tdata$$) );
389331
PROVIDE( __tdata_size = SIZEOF(__ram_tdata$$) );

‎ARM/gcc_clang/linker_scripts/renesas/clang-llvm/r7fa0e1053cnh.ld‎

Lines changed: 0 additions & 58 deletions
Original file line numberDiff line numberDiff line change
@@ -30,54 +30,6 @@ ENTRY(Reset_Handler)
3030
SECTIONS
3131
{
3232
/***** DATA_FLASH memory section allocations ******/
33-
__etext = .;
34-
35-
/* Initialized data section. */
36-
.data :
37-
{
38-
__data_start__ = .;
39-
. = ALIGN(4);
40-
41-
__Code_In_RAM_Start = .;
42-
43-
KEEP(*(.code_in_ram*))
44-
__Code_In_RAM_End = .;
45-
46-
*(vtable)
47-
/* Don't use *(.data*) because it will place data meant for .data_flash in this section. */
48-
*(.data.*)
49-
*(.data)
50-
51-
. = ALIGN(4);
52-
/* preinit data */
53-
PROVIDE_HIDDEN (__preinit_array_start = .);
54-
KEEP(*(.preinit_array))
55-
PROVIDE_HIDDEN (__preinit_array_end = .);
56-
57-
. = ALIGN(4);
58-
/* init data */
59-
PROVIDE_HIDDEN (__init_array_start = .);
60-
KEEP(*(SORT(.init_array.*)))
61-
KEEP(*(.init_array))
62-
PROVIDE_HIDDEN (__init_array_end = .);
63-
64-
65-
. = ALIGN(4);
66-
/* finit data */
67-
PROVIDE_HIDDEN (__fini_array_start = .);
68-
KEEP(*(SORT(.fini_array.*)))
69-
KEEP(*(.fini_array))
70-
PROVIDE_HIDDEN (__fini_array_end = .);
71-
72-
KEEP(*(.jcr*))
73-
74-
. = ALIGN(4);
75-
76-
/* All data end */
77-
__data_end__ = .;
78-
79-
} > RAM AT > FLASH
80-
8133
.data_flash.startof :
8234
{
8335
__ddsc_DATA_FLASH_START = . ;
@@ -373,17 +325,7 @@ SECTIONS
373325
__ddsc_OPTION_SETTING_OSIS_END = . ;
374326
} > OPTION_SETTING_OSIS
375327

376-
.bss :
377-
{
378-
. = ALIGN(4);
379-
__bss_start__ = .;
380-
*(.bss*)
381-
*(COMMON)
382-
. = ALIGN(4);
383-
__bss_end__ = .;
384-
} > RAM
385328
}
386-
387329
PROVIDE( __tls_base = ADDR(__ram_tdata$$) );
388330
PROVIDE( __tdata_source = LOADADDR(__ram_tdata$$) );
389331
PROVIDE( __tdata_size = SIZEOF(__ram_tdata$$) );

‎ARM/gcc_clang/linker_scripts/renesas/clang-llvm/r7fa0e1053cnk.ld‎

Lines changed: 0 additions & 58 deletions
Original file line numberDiff line numberDiff line change
@@ -30,54 +30,6 @@ ENTRY(Reset_Handler)
3030
SECTIONS
3131
{
3232
/***** DATA_FLASH memory section allocations ******/
33-
__etext = .;
34-
35-
/* Initialized data section. */
36-
.data :
37-
{
38-
__data_start__ = .;
39-
. = ALIGN(4);
40-
41-
__Code_In_RAM_Start = .;
42-
43-
KEEP(*(.code_in_ram*))
44-
__Code_In_RAM_End = .;
45-
46-
*(vtable)
47-
/* Don't use *(.data*) because it will place data meant for .data_flash in this section. */
48-
*(.data.*)
49-
*(.data)
50-
51-
. = ALIGN(4);
52-
/* preinit data */
53-
PROVIDE_HIDDEN (__preinit_array_start = .);
54-
KEEP(*(.preinit_array))
55-
PROVIDE_HIDDEN (__preinit_array_end = .);
56-
57-
. = ALIGN(4);
58-
/* init data */
59-
PROVIDE_HIDDEN (__init_array_start = .);
60-
KEEP(*(SORT(.init_array.*)))
61-
KEEP(*(.init_array))
62-
PROVIDE_HIDDEN (__init_array_end = .);
63-
64-
65-
. = ALIGN(4);
66-
/* finit data */
67-
PROVIDE_HIDDEN (__fini_array_start = .);
68-
KEEP(*(SORT(.fini_array.*)))
69-
KEEP(*(.fini_array))
70-
PROVIDE_HIDDEN (__fini_array_end = .);
71-
72-
KEEP(*(.jcr*))
73-
74-
. = ALIGN(4);
75-
76-
/* All data end */
77-
__data_end__ = .;
78-
79-
} > RAM AT > FLASH
80-
8133
.data_flash.startof :
8234
{
8335
__ddsc_DATA_FLASH_START = . ;
@@ -373,17 +325,7 @@ SECTIONS
373325
__ddsc_OPTION_SETTING_OSIS_END = . ;
374326
} > OPTION_SETTING_OSIS
375327

376-
.bss :
377-
{
378-
. = ALIGN(4);
379-
__bss_start__ = .;
380-
*(.bss*)
381-
*(COMMON)
382-
. = ALIGN(4);
383-
__bss_end__ = .;
384-
} > RAM
385328
}
386-
387329
PROVIDE( __tls_base = ADDR(__ram_tdata$$) );
388330
PROVIDE( __tdata_source = LOADADDR(__ram_tdata$$) );
389331
PROVIDE( __tdata_size = SIZEOF(__ram_tdata$$) );

‎ARM/gcc_clang/linker_scripts/renesas/clang-llvm/r7fa0e1053cnl.ld‎

Lines changed: 0 additions & 58 deletions
Original file line numberDiff line numberDiff line change
@@ -30,54 +30,6 @@ ENTRY(Reset_Handler)
3030
SECTIONS
3131
{
3232
/***** DATA_FLASH memory section allocations ******/
33-
__etext = .;
34-
35-
/* Initialized data section. */
36-
.data :
37-
{
38-
__data_start__ = .;
39-
. = ALIGN(4);
40-
41-
__Code_In_RAM_Start = .;
42-
43-
KEEP(*(.code_in_ram*))
44-
__Code_In_RAM_End = .;
45-
46-
*(vtable)
47-
/* Don't use *(.data*) because it will place data meant for .data_flash in this section. */
48-
*(.data.*)
49-
*(.data)
50-
51-
. = ALIGN(4);
52-
/* preinit data */
53-
PROVIDE_HIDDEN (__preinit_array_start = .);
54-
KEEP(*(.preinit_array))
55-
PROVIDE_HIDDEN (__preinit_array_end = .);
56-
57-
. = ALIGN(4);
58-
/* init data */
59-
PROVIDE_HIDDEN (__init_array_start = .);
60-
KEEP(*(SORT(.init_array.*)))
61-
KEEP(*(.init_array))
62-
PROVIDE_HIDDEN (__init_array_end = .);
63-
64-
65-
. = ALIGN(4);
66-
/* finit data */
67-
PROVIDE_HIDDEN (__fini_array_start = .);
68-
KEEP(*(SORT(.fini_array.*)))
69-
KEEP(*(.fini_array))
70-
PROVIDE_HIDDEN (__fini_array_end = .);
71-
72-
KEEP(*(.jcr*))
73-
74-
. = ALIGN(4);
75-
76-
/* All data end */
77-
__data_end__ = .;
78-
79-
} > RAM AT > FLASH
80-
8133
.data_flash.startof :
8234
{
8335
__ddsc_DATA_FLASH_START = . ;
@@ -373,17 +325,7 @@ SECTIONS
373325
__ddsc_OPTION_SETTING_OSIS_END = . ;
374326
} > OPTION_SETTING_OSIS
375327

376-
.bss :
377-
{
378-
. = ALIGN(4);
379-
__bss_start__ = .;
380-
*(.bss*)
381-
*(COMMON)
382-
. = ALIGN(4);
383-
__bss_end__ = .;
384-
} > RAM
385328
}
386-
387329
PROVIDE( __tls_base = ADDR(__ram_tdata$$) );
388330
PROVIDE( __tdata_source = LOADADDR(__ram_tdata$$) );
389331
PROVIDE( __tdata_size = SIZEOF(__ram_tdata$$) );

‎ARM/gcc_clang/linker_scripts/renesas/clang-llvm/r7fa0e1053csc.ld‎

Lines changed: 0 additions & 58 deletions
Original file line numberDiff line numberDiff line change
@@ -30,54 +30,6 @@ ENTRY(Reset_Handler)
3030
SECTIONS
3131
{
3232
/***** DATA_FLASH memory section allocations ******/
33-
__etext = .;
34-
35-
/* Initialized data section. */
36-
.data :
37-
{
38-
__data_start__ = .;
39-
. = ALIGN(4);
40-
41-
__Code_In_RAM_Start = .;
42-
43-
KEEP(*(.code_in_ram*))
44-
__Code_In_RAM_End = .;
45-
46-
*(vtable)
47-
/* Don't use *(.data*) because it will place data meant for .data_flash in this section. */
48-
*(.data.*)
49-
*(.data)
50-
51-
. = ALIGN(4);
52-
/* preinit data */
53-
PROVIDE_HIDDEN (__preinit_array_start = .);
54-
KEEP(*(.preinit_array))
55-
PROVIDE_HIDDEN (__preinit_array_end = .);
56-
57-
. = ALIGN(4);
58-
/* init data */
59-
PROVIDE_HIDDEN (__init_array_start = .);
60-
KEEP(*(SORT(.init_array.*)))
61-
KEEP(*(.init_array))
62-
PROVIDE_HIDDEN (__init_array_end = .);
63-
64-
65-
. = ALIGN(4);
66-
/* finit data */
67-
PROVIDE_HIDDEN (__fini_array_start = .);
68-
KEEP(*(SORT(.fini_array.*)))
69-
KEEP(*(.fini_array))
70-
PROVIDE_HIDDEN (__fini_array_end = .);
71-
72-
KEEP(*(.jcr*))
73-
74-
. = ALIGN(4);
75-
76-
/* All data end */
77-
__data_end__ = .;
78-
79-
} > RAM AT > FLASH
80-
8133
.data_flash.startof :
8234
{
8335
__ddsc_DATA_FLASH_START = . ;
@@ -373,17 +325,7 @@ SECTIONS
373325
__ddsc_OPTION_SETTING_OSIS_END = . ;
374326
} > OPTION_SETTING_OSIS
375327

376-
.bss :
377-
{
378-
. = ALIGN(4);
379-
__bss_start__ = .;
380-
*(.bss*)
381-
*(COMMON)
382-
. = ALIGN(4);
383-
__bss_end__ = .;
384-
} > RAM
385328
}
386-
387329
PROVIDE( __tls_base = ADDR(__ram_tdata$$) );
388330
PROVIDE( __tdata_source = LOADADDR(__ram_tdata$$) );
389331
PROVIDE( __tdata_size = SIZEOF(__ram_tdata$$) );

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