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new amd registers
Signed-off-by: Slice <[email protected]>
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/** @file ArchitecturalMsr.h
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AMD Architectural MSR Definitions.
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Provides defines for Machine Specific Registers(MSR) indexes.
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Copyright (c) Microsoft Corporation.
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SPDX-License-Identifier: BSD-2-Clause-Patent
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@par Specification Reference:
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AMD64 Architecture Programmer’s Manual, Volumes 2
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Rev. 3.37, Volume 2: System Programming
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**/
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#ifndef AMD_ARCHITECTURAL_MSR_H_
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#define AMD_ARCHITECTURAL_MSR_H_
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/*
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See Appendix A.8, "System Management Mode MSR Cross-Reference".
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SMBASE MSR that contains the SMRAM base address.
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Reset value: 0000_0000_0003_0000h
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*/
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#define AMD_64_SMM_BASE 0xC0010111
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/*
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See Appendix A.8, "System Management Mode MSR Cross-Reference".
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SMM_ADDR Contains the base address of protected
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memory for the SMM Handler.
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Specific usage, see AMD64 Architecture Programmer’s Manual,
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Volumes 2 (Rev. 3.37), Section 10.2.5
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Reset value: 0000_0000_0000_0000h
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*/
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#define AMD_64_SMM_ADDR 0xC0010112
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/*
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See Appendix A.8, "System Management Mode MSR Cross-Reference".
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SMM_MASK Contains a mask which determines the size of
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the protected area for the SMM handler.
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Specific usage, see AMD64 Architecture Programmer’s Manual,
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Volumes 2 (Rev. 3.37), Section 10.2.5
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Reset value: 0000_0000_0000_0000h
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*/
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#define AMD_64_SMM_MASK 0xC0010113
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#endif // AMD_ARCHITECTURAL_MSR_H_

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